The First Workshop on Resource Disaggregation

( WORD 2019 )

Held in conjunction with The 24th ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS 2019)

April 13, 2019
Providence, Rhode Island, USA
**Salon 2**

 
 

Call for papers

Recent hardware developments and application trends are challenging the long-standing datacenter architecture where a server is the unit of deployment, operation, and failure. With the current server-centric datacenter architecture, it is fundamentally difficult to fully utilize, add, remove, or reorganize hardware components. A promising solution to these issues is to physically or virtually disaggregate hardware resources. Physical resource disaggregation breaks a computer server into independent, network-attached hardware devices. Virtual resource disaggregation maintains existing server model and uses resources on remote machines virtually.

The 1st Workshop on Resource Disaggregation (WORD'19) will bring together researchers and practitioners in hardware, software, networking, programming language, and application domains to engage in a lively discussion on a wide range of topics in the broad definition of resource disaggregation, including both physical and virtual resource disaggregation. We solicit both position papers that explore new challenges and design spaces and short papers that include completed or early-stage work.


Topics of interest include but are not limited to:
  1. Hardware design for resource disaggregation
  2. Network for resource disaggregation
  3. Disaggregated and remote memory
  4. Disaggregated and remote storage
  5. Simulation and measurement of disaggregated cluster
  6. Resource management of disaggregated cluster
  7. Deployment of disaggregated cluster
  8. Application and programming models for resource disaggregation
  9. Virtualization of disaggregated hardware


We encourage researchers from all institutions to submit their work for review. Preliminary results of interesting ideas and work-in-progress are welcome.
Submissions that are likely to generate vigorous discussion will be favored!

Organizers

Yiying Zhang, Purdue University

Christina Delimitrou, Cornell University

Hakim Weatherspoon, Cornell University


Program

10:15am-10:30am -- Opening Remarks


10:30am-11:00am -- Break


11:00am-12:00pm -- Session 1: Memory Disaggregation (Session chair: Yiying Zhang)

  • End Performance SLA Support for Disaggregated Memory, Kwangwon Koh (ETRI), Kangho Kim (ETRI), Changdae Kim (ETRI), Jaehyuk Huh (KAIST). [pdf]

    Bio: Kwangwon Koh is a principal researcher at ETRI. He has worked on several projects such as virtualization for ARM architecture, super-computing system for genome processing, and scalable operating system for many-core processors. He received his PhD degree from KAIST. His research interests include system software for parallel computing, virtualization, and disaggregated memory system.

  • Exploring the Disaggregated Memory Interface Design Space, Nathan Pemberton (UC Berkeley). [pdf]

    Bio: Nathan is a PhD student at UC Berkeley studying computer architecture and operating systems for warehouse-scale computers (WSCs). His work focuses on interfaces to remote and disaggregated memory and tools and methodologies for hardware/software co-design. Specifically, he works on the FireBox warehouse-scale computer and FireSim, an fpga-accelerated, cycle-exact data center simulator.



12:00pm-1:30pm -- Lunch


1:30pm-2:30pm -- Keynote: Sharad Singhal, HP -- The Machine—Memory-Driven Computing [pdf]

Abstract: In 2014, Hewlett Packard Labs undertook an ambitious project to re-think the architecture of servers within a data center: The Machine. Spurred by computational limitations posed by the end of Moore’s Law and the ever increasing volume of data that needs to be processed in real-time, The Machine combined elements from both scale-up and scale-out architectures. Rather than putting the CPU at the center of the computer, and surrounding it by memory and peripherals, The Machine holds all data in disaggregated memory that can be directly connected to CPUs, special purpose accelerators and peripherals. In this talk, I will discuss the motivation for developing The Machine, its architecture, and some of the early results we obtained from emulating the architecture on large multi-core servers. I will describe how we are now taking some of the ideas developed during the project into products, and conclude with implications for programming such architectures.

Bio: Sharad Singhal is a Distinguished Technologist and Director, Applications and Software, at Hewlett Packard Laboratories. He has worked on a variety of research topics including big data analytics, cloud computing, methods for controlling service quality in multi-tier applications, speech and signal processing, and personal communication systems. Sharad obtained his PhD degree from Yale University. He holds 43 patents and has published over 100 papers in a variety of refereed journals and conferences. He is a member of the IEEE.



2:30pm-3:00pm -- Break


3:00pm-4:00pm -- Session 2: Disaggregation and Emerging Programming Frameworks (Session chair: Christina Delimitrou)

  • Performance-Efficient Notification Paradigms for Disaggregated OLDI Microservices, Akshitha Sriraman, Tom Wenisch (University of Michigan)

    Bio: Akshitha Sriraman is a Ph.D. candidate at the University of Michigan where she is advised by Prof. Thomas F. Wenisch. Her research interests include computer architecture and software systems with a special emphasis on data center architectures and large-scale distributed systems.

  • The Serverless Data Center: Hardware Disaggregation Meets Serverless Computing, Nathan Pemberton, Johann Schleier-Smith (UC Berkeley). [pdf]

    Bio: Nathan is a PhD student at UC Berkeley studying computer architecture and operating systems for warehouse-scale computers (WSCs). His work focuses on interfaces to remote and disaggregated memory and tools and methodologies for hardware/software co-design. Specifically, he works on the FireBox warehouse-scale computer and FireSim, an fpga-accelerated, cycle-exact data center simulator.






Program Committee

Irina Calciu, VMWare
Mosharaf Chowdhury, University of Michigan
Paolo Costa, Microsoft
Alex Daglis, Georgia Tech
Christina Delimitrou, Cornell University
Ionel Gog, UC Berkeley
Haris Volos, Google
Wei Wang, University of Texas, San Antonio
Hakim Weatherspoon, Cornell University
Neeraja Yadwadkar, Stanford University
Yiying Zhang, Purdue University
Noa Zilberman, University of Cambridge



Submissions

Submissions must be no longer than 4 pages including figures and tables, plus as many pages as needed for references. Text should be formatted in two columns on 8.5 x 11-inch paper using 10-point Times-Roman font on 12-point (single-spaced) leading, 1-inch margins, and a 0.25-inch gutter (separation between the columns). The title, author names, affiliations, and an abstract should appear on the first page. Pages should be numbered. Figures and tables should not require magnification for viewing; they may contain color, but should be legible when printed or displayed in black and white. Submissions not meeting these criteria will be rejected without review, and no deadline extensions will be granted for reformatting. Papers should be submitted as PDF files via the submission site.



Important dates

Paper submissions due: Mar 6, 2019
Notification: March 23, 2019
Final paper due: April 5, 2019
Workshop date: April 13, 2019


 

Questions

Please contact the co-chairs (yiying@purdue.edu, delimitrou@cornell.edu, hweather@cs.cornell.edu) if you have any questions.